1. Field of the Invention
The invention relates to introducing at least two metals into a chamber and forming a layer over a substrate, and more specifically, to forming an alloy layer over a substrate.
2. Background
Integrated circuit structures are generally formed of numerous discrete devices on a semiconductor chip such as a silicon semiconductor chip. The individual devices are interconnected in appropriate patterns to one another and to external devices through the use of interconnection lines or interconnects to form an integrated device. Typically, many integrated circuit devices are formed on a single structure, such as a wafer substrate and, once formed, are separated into individual chips or dies for use in various environments.
There are several conventional processes for introducing metals such as aluminum, aluminum alloy, or platinum to form an interconnect over a substrate. The metal is generally introduced in the form of a deposition process, (e.g., chemical vapor deposition (CVD), focused ion beam (FIB) deposition) and patterned by way of an etching process into a discrete line or lines. FIB deposition is generally used to introduce thin metal lines to form a metal pattern or layer over a substrate. Typically, a single metal such as platinum, tungsten, or molybdenum is introduced over a substrate by a FIB deposition system. Another process for introducing a metal interconnect, particularly copper or its alloy over a substrate is the damascene process. The damascene process introduces copper interconnect according to a desired pattern previously formed in a dielectric material over a substrate.
Yet another process is FIB metal deposition which is generally used to introduce thin metal lines or arbitrary patterns as a layer over a substrate. FIB deposition is used for modification of small metallic structures such as the modification of existing interconnects in integrated circuits.
One disadvantage to these approaches is that the interconnect that is formed on the substrate has a relatively high electrical resistance such as 160 xcexcohm-centimeters (xcexcohm-cm) to 200 xcexcohm-cm. This may be due to the surface property that results from the use of a single metal that provides poor bulk electrical resistance or to the existence of elements like carbon which originate from the precursor. Generally, the resistance of an alloy such as tungsten-carbon-cobalt is lower than that of metal alloy such as tungsten-carbon. J. Brooks, Properties of Tungsten Carbide Cobalt Alloy, 232 (1994). What is needed is a process and a tool that allows for the introduction of metals to form a layer over a substrate that decreases the electrical resistance of the layer.